Generally speaking, the function of a DC/DC voltage converter at its output is either to increase a voltage present at its input, or to decrease it, in order to supply the device located downstream. FIG. 1 shows a Buck converter according to the prior art. This converter comprises two voltage-controlled switches Qhs and Qls of the MOSFET (for Metal Oxide Semiconductor Field Effect Transistor) type, a regulation circuit in current control mode which allows the output voltage level Vout of the converter to be regulated as a function of the signal Mes. I from the current flowing in the first switch Qhs. This regulation circuit comprises:                a control circuit 107 which may take the form of a programmed or wired logic circuit, such as with flip-flops, and which allows the opening or the closing of the switches to be controlled;        an error amplifier MEA which generates a setpoint signal Icons proportional to a difference between the output voltage level of the converter and a reference voltage;        a comparator Comp allowing the signal from the current flowing in the first switch and the setpoint signal to be compared.        
The converter also comprises, at the output, a low-pass filter formed by an output inductor Lout and by an output capacitor Cout. An oscillator Osc connected to the input of the control circuit allows the first switch to be controlled on the rising edge of its pulses. The Buck converter comprises two distinct regimes within its operational period. Each regime is characterized by the state of the first switch Qhs. A regime called “ON” is obtained for a closed state of the first switch Qhs, whereas a regime called “OFF” corresponds to an open state of the first switch.
The oscillator is connected to the input ON of the control circuit 107 and allows one operational period to be triggered, on the rising edges of its pulses, by generating the command to close the first switch HS_Cmd. This close command begins the “ON” regime of the converter. The oscillator may be implemented by means of an analogue circuit or of a resonator or of a quartz crystal and fixes the frequency of operation of the converter.
In a first phase (“ON” regime), the first switch Qhs is closed. The current increases rapidly until it reaches the value of that flowing in the output inductor, then it increases more slowly until it reaches its maximum value at the end of this first phase. The current in the output inductor increases and is equal to the current in Qhs. During the whole of this phase, the second switch Qls is open (the command to open has taken place just before closing the switch Qhs). The command to close Qhs and the command to open Qls take place with losses that increase with the frequency of operation of the converter.
In a second phase (“OFF” regime), the switch Qhs receives a command to open, then the switch Qls receives a command to close. The current in the output inductor is equal to the current in Qls and is falling. The command to open Qhs and, to a lesser extent, the command to close Qls takes place with losses and increases with the frequency of operation of the converter.
The regulation of the converted output voltage is linear and comprises two nested control loops. The first loop is external and formed with the error amplifier MEA which allows a setpoint signal Icons to be generated being an image of a current which is a function of (for example to) the difference between a reference voltage Vref, connected to its first input, and the converted voltage level connected to its second input. This first loop controls the average value of the converted voltage level. The second loop is internal and formed with the comparator Comp whose first input is presented to the setpoint signal Icons and whose second input is presented to the signal Imes, image of the current flowing in the first switch. This second loop allows a control on the maximum value of the current. The command to open Qhs occurs when the image signal of the current Mes. I reaches the value of the image signal Icons.
In this type of converter, the reactive elements are bulky.
One known solution aimed at reducing the size of the reactive elements, and as a consequence that of the converter, consists in increasing the switching frequency of the switches. Nevertheless, this increase of the switching frequency increases the switching losses and leads to problems of electromagnetic incompatibilities. The speed of the regulation of the voltage level is an important factor for this type of converter because it allows a constant voltage to be delivered to the load irrespective of the current demands that the latter imposes (high and abrupt demands for latest generation digital loads). With the principle of regulation implemented in the prior art, the speed of regulation is limited by the speed of the error amplifier and by the compliance to the margins of stability for a stable control of the output voltage. This stability may also be affected by the nature of the output load (choice of the user). In order to have a stable system, the maximum speed of regulation is fixed during the design phase and it cannot be improved by choices decided by the user (addition of an output capacitor, for example). This type of regulation leads to compromises being made which need to be compensated by the increase of the output capacitance and do not allow the size of the converter to be minimized.